A Low-cost Fault Tolerance Method for ARM and RISC-V Microprocessor-based Systems using Temporal Redundancy and Approximate Computing through Simplified Iterations

Approximate Computing techniques have been successfully used to reduce the overhead associated with redundancy in fault-tolerant system designs. This paper presents a fault tolerance method execution time of well-known Time Redundancy technique by means an improvement proposed for software-based known as loop perforation. is that involves executing replicas task at different times. We propose approximate tasks be executed using new computing based on perforation, i.e., simplified iterations. The novelty this combined use technique, temporal redundancy, jointly proposal validated through simulation-based injection campaigns several test programs ARM and RISC-V microprocessor architectures. Experimental results verified not only applicability architectures, but also its effectiveness, showing good trade-off between reliability, error overhead. Results showed method, normalized mean work failure (MWTF) up 5.28× was obtained approximation errors lower than those traditional perforation technique.